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Analysis of Metastable Operation in a CMOS Dynamic D-Latch

โœ Scribed by J. Juan-Chico; M. J. Bellido; A. J. Acosta; M. Valencia; J. L. Huertas

Book ID
110260921
Publisher
Springer
Year
1997
Tongue
English
Weight
416 KB
Volume
14
Category
Article
ISSN
0925-1030

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๐Ÿ“œ SIMILAR VOLUMES

Systematic reducing of metastable operat
Systematic reducing of metastable operations in CMOS D flip-flops
โœ Yoichiro Sato; Yoshinobu Yamasoto; Masanori Saito; Hiroto Kagotani; Takuji Okamo ๐Ÿ“‚ Article ๐Ÿ“… 2000 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 304 KB

This paper systematically examines a method of reducing metastable (MS) operation in an edge-trigger type CMOS D flip-flop (EDFF) and a master-slave type D flip-flop (MDFF). To obtain a general idea, the mechanism of the MS operation of each flip-flop (FF) contained in the EDFF and MDFF has been cla