β Scribed by D. E. Thomas, E. D. Lagnese, R. A. Walker, J. A. Nestor, J. V. Rajan, R. L. Blackburn (auth.)
No coin nor oath required. For personal study only.
Recently there has been increased interest in the development of computer-aided design programs to support the system level designer of integrated circuits more actively. Such design tools hold the promise of raising the level of abstraction at which an integrated circuit is designed, thus releasing the current designers from many of the details of logic and circuit level design. The promise further suggests that a whole new group of designers in neighboring engineering and science disciplines, with far less understanding of integrated circuit design, will also be able to increase their productivity and the functionality of the systems they design. This promise has been made repeatedly as each new higher level of computer-aided design tool is introduced and has repeatedly fallen short of fulfillment. This book presents the results of research aimed at introducing yet higher levels of design tools that will inch the integrated circuit design community closer to the fulfillment of that promise. 1. 1. SYNTHESIS OF INTEGRATED CmCUITS In the integrated circuit (Ie) design process, a behavior that meets certain specifications is conceived for a system, the behavior is used to produce a design in terms of a set of structural logic elements, and these logic elements are mapped onto physical units. The design process is impacted by a set of constraints as well as technological information (i. e. the logic elements and physical units used for the design).
Front Matter....Pages i-xiii
Introduction....Pages 1-14
Design Representations and Synthesis....Pages 15-42
Transformations....Pages 43-78
Architectural Partitioning (APARTY)....Pages 79-106
Control Step Scheduling (CSTEP)....Pages 107-132
Data Path Allocation (EMUCS)....Pages 133-155
Microprocessor Synthesis (SUGAR)....Pages 157-199
Synthesis Results....Pages 201-255
Correlating the Multilevel Design Representation (CORAL)....Pages 257-274
Observations and Future Work....Pages 275-280
Back Matter....Pages 281-305
Circuits and Systems;Electrical Engineering;Computer-Aided Engineering (CAD, CAE) and Design
π SIMILAR VOLUMES
<p>A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising
Standard syntax and semantics for VerilogR HDL-based RTL synthesis are described in this standard.
A standard syntax and semantics for VHDL register transfer level (RTL) synthesis is defined. The subset of IEEE 1076 (VHDL) that is suitable for RTL synthesis is defined, along with the semantics of that subset for the synthesis domain.
<p><em>System-Level Synthesis</em> deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommu
<p><em>System-Level Synthesis</em> deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommu