Advanced Ultra Low-Power Semiconductor Devices. Design and Applications

✍ Scribed by Shubham Tayal Abhishek Kumar Upadhyay Shiromani Balmukund Rahi, Young Suh Song

• Publisher: Scrivener Publishing, Wiley Blackwell
• Year: 2023
• Tongue: English
• Leaves: 313
• Category: Library

✦ Table of Contents

Cover
Title Page
Copyright Page
Contents
Preface
Chapter 1 Subthreshold Transistors: Concept and Technology
1.1 Introduction
1.2 Major Sources of Leakage and Possible Methods of Prevention
1.2.1 Leakage Mechanisms in MOS Transistors
1.2.1.1 Current I1
1.2.1.2 Current I2
1.2.1.3 Current I3
1.2.1.4 Current I4
1.2.1.5 Current I5
1.2.1.6 Current I6
1.2.2 Leakage Reduction Techniques
1.2.2.1 Leakage Reduction by Channel Processing
1.2.2.2 Leakage Reduction Through Different Circuit Techniques
1.2.2.3 Scaling of Supply Voltage
1.3 Possibilities and Challenges
1.4 Conclusions
References
Chapter 2 Introduction to Conventional MOSFET and Advanced Transistor TFET
2.1 Introduction
2.2 Device Structure
2.3 TFET Principle of Operation
2.3.1 OFF State
2.3.2 ON State
2.4 Material Characterization
2.4.1 Group IV Materials
2.4.2 Group III-V Materials
2.4.3 Heterostructures
2.4.4 2D Materials
2.5 Characteristics of TFET
2.5.1 Subthreshold Swing
2.5.2 ION/IOFF Ratio
2.5.3 Ambipolar Effect
2.6 Comparison of OFF-State Characteristics
2.7 Phonon Scattering’s Impact
2.8 ON-State Performance Comparison
2.9 Performance Analysis Based on Intrinsic Delay
2.10 Bandgap’s Effect on Device Performance
2.11 MOSFET and TFET Scaling Behaviour
2.12 Surface Potential of an N-TFET and N-MOSFET
2.13 Professional Advantages of TFET over MOSFET
2.14 Conclusion
References
Chapter 3 Operation Principle and Fabrication of TFET
3.1 Introduction
3.2 Planar MOSFET’s Limitations
3.2.1 Effects of Short Channels
3.3 Demand for Low Power Operation
3.4 TFET: Operation Principle of TFET
3.5 TFET: Recent Design Issues in TFET
3.5.1 TFET: Subthreshold Swing Perspective
3.5.2 TFET: Power Consumption Perspective
3.6 TFET: Modeling and Application
3.6.1 TFET: Modeling
3.6.2 TFET: Application
3.7 TFET: Fabrication Perspective
3.8 TFET: Applications and Future of Low-Power Electronics
3.9 Expected Challenges in Replacing MOSFET with TFET
3.10 Conclusion
References
Chapter 4 Mathematical Modeling of TFET and Its Future Applications: Ultra Low.Power SRAM Circuit and III-IV TFET
4.1 Introduction
4.2 Modeling Approaches
4.2.1 Atomistic Modeling
4.2.2 Analytical Modeling
4.3 Structure
4.3.1 Effect Transistor
4.3.2 Compact Models
4.4 Applications of Tunnel Field-Effect Transistor
4.4.1 TFET for Biosensor Applications
4.4.2 TFET-Based Memory Devices
4.4.3 TFETs for Mixed Signal Applications
4.4.4 TFETs for Analog/RF Applications
4.4.5 TFETs for Low-Power Applications
4.5 Road Ahead for Tunnel Field Effect Transistors
References
Chapter 5 Analysis of Channel Doping Variation on Transfer Characteristics to High Frequency Performance of F-TFET
5.1 Introduction
5.2 Simulated Device Structure and Parameters
5.3 DC Characteristics
5.4 Analysis of Analog/RF FOMs
5.5 Conclusion
References
Chapter 6 Comparative Study of Gate Engineered TFETs and Optimization of Ferroelectric Heterogate TFET Structure
6.1 Introduction
6.2 Study of Different TFET Structures
6.2.1 Simulation Configuration
6.2.2 Comparison of Electrical Parameters of Different Structures of TFET
6.3 Proposed Structure
6.4 Results and Discussion
6.4.1 2-D Model for Surface Potential
6.4.2 Study of Electrical Characteristics
6.4.2.1 Average Subthreshold Swing and ION/IOFF
6.4.2.2 DIBL
6.4.2.3 RDF Effect
6.4.2.4 Temperature Dependence
6.4.2.5 Study of Interface Traps
6.4.3 Memory Window
6.5 Conclusion
6.6 Future Scope
References
Chapter 7 State of the Art Tunnel FETs for Low Power Memory Applications
7.1 Static Random Access Memory
7.1.1 Working of 6T-SRAM Cell
7.1.1.1 Read Operation
7.1.1.2 Write Operation
7.2 Performance Parameters of SRAM Cell
7.3 TFET-Based SRAM Cell Design
7.3.1 6T SRAM Designs
7.3.2 7T- SRAM Cell Design
7.3.3 8T- SRAM Cell
7.3.4 10 T- SRAM Cell
7.3.5 SRAM Cell Design Based on Negative Differential Resistance Property
7.4 Conclusion
References
Chapter 8 Epitaxial Layer-Based Si/SiGe Hetero-Junction Line Tunnel FETs: A Physical Insight
8.1 Fundamental Limitation of CMOS: Tunnel FETs
8.2 Working Principle of Tunnel FET
8.3 Point and Line TFETs: Tunneling Direction
8.4 Perspective of Line TFETs
8.4.1 Planar Line Tunnel FETs
8.4.2 3D Line TFETs
8.5 Analytical Models of Line TFETs
8.6 Line TFETs for Analog & Digital Circuits Design
8.7 Other Steep Slope Devices
8.8 Conclusion
References
Chapter 9 Investigation of Thermal Performance on Conventional and Junctionless Nanosheet Field Effect Transistors
9.1 Introduction
9.2 Device Simulation Details
9.3 Results and Discussion
9.3.1 Comparison of Thermal Characteristics of Conventional (CL) and Junctionless (JL) NSFET
9.3.2 Comparison of Thermal Performance of High-k Gate Dielectrics for CL NSFET and JL NSFET
9.3.3 Comparison of Thermal Performance of Spacer Dielectrics for CL NSFET and JL NSFET
9.4 Conclusion
Acknowledgement
References
Chapter 10 Introduction to Newly Adopted NCFET and Ferroelectrics for Low-Power Application
10.1 Introduction
10.2 NCFET and Its Design Constraints
10.2.1 Ferroelectric Materials
10.2.2 NCFET Structure
10.2.3 Capacitance Matching and Ferroelectric Parameters
10.3 NCFET for Low-Power Applications
10.3.1 NCFET for Circuit and System Design
10.3.2 Impact of Process Variations on NCFET
10.3.3 Analytical Models for NCFET
10.4 Summary
References
Chapter 11 Application of Ferroelectrics: Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses
11.1 Introduction
11.2 Ferroelectricity in Hafnium Oxide
11.2.1 Thermodynamic and Kinetic Origin of the Ferroelectric Phase
11.2.2 Microstructure-Based Variability in Ferroelectric Response
11.3 IGZO Based Ferroelectric Thin Film Transistor
11.3.1 Integration and Performance of FeTFT Devices
11.3.2 Characterization of FeTFT-Based Neuromorphic Devices
11.4 Applications in Neural Networks
11.4.1 Monolithic 3D Inference Engine
11.5 Conclusion
References
Chapter 12 Radiation Effects and Their Impact on SRAM Design: A Comprehensive Survey with Contemporary Challenges
12.1 Introduction
12.2 Literature Survey
12.3 Impact of Radiation Effects on Sram Cells
12.4 Results and Discussion
12.5 Conclusion
Declarations
Data Availability
References
Chapter 13 Final Summary and Future of Advanced Ultra Low Power Metal Oxide Semiconductor Field Effect Transistors
13.1 Introduction
13.2 Challenges in Future Ultra-Low Power Semiconductors
13.3 Conclusion
References
Index
EULA