The impact of material / process interactions on low temperature CVD-O low-k dielectric film properties are 3 presented. The film under investigation is deposited following a three-step process consisting of a low temperature chemical vapor deposition (CVD), an ex situ high temperature cure in a con
A selective CMP process for stacked low-k CVD oxide films
โ Scribed by E Hartmannsgruber; G Zwicker; K Beekmann
- Publisher
- Elsevier Science
- Year
- 2000
- Tongue
- English
- Weight
- 723 KB
- Volume
- 50
- Category
- Article
- ISSN
- 0167-9317
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โฆ Synopsis
A chemical mechanical polishing process for a stacked low-k dielectric material, which is suitable for inter-metal dielectric applications, has been developed. The dielectric is deposited by CVD and composed of a methyl-doped silicon oxide (i.e., low-k Flowfill) embedded between thin SiO layers. A new CMP parameter is introduced, which is the removal 2 rate selectivity between two different kinds of materials. We were able to adjust the selectivity between cap and low-k Flowfill layer in a range between 3:1 and 1:5 by tuning the slurry mixture. Different test structures were used to investigate the effect of the removal rate selectivity on the planarisation efficiency of the CMP process. A higher removal rate of the low-k Flowfill layer in comparison to that of the cap layer results in a significant increase of the planarisation length and a reduction of the overpolish needed to achieve planarity.
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