𝔖 Bobbio Scriptorium
✦   LIBER   ✦

A RISC prolog machine architecture

✍ Scribed by J Vlahavas; C Halatsis


Publisher
Elsevier Science
Year
1987
Weight
589 KB
Volume
21
Category
Article
ISSN
0165-6074

No coin nor oath required. For personal study only.


πŸ“œ SIMILAR VOLUMES


MARS: a RISC-based architecture for Lisp
✍ Hung-Chang Lee; Feipei Lai; Jenn-Yuan Tsai; Tai-Ming Parng πŸ“‚ Article πŸ“… 1990 πŸ› Elsevier Science 🌐 English βš– 952 KB

A RISC-based chip set architecture for Lisp is presented in this paper. This architecture contains an instruction fetch unit (IFU) and three processing units--integer processing unit (IPU), floating-point processing unit (FPU), and list processing unit (LPU). The IFU feeds instructions to the proces