A reconfigurable analog VLSI neural netw
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Bo, G. M.; Caviglia, D. D.; Valle, M.; Stratta, R.; Trucco, E.
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Article
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1998
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John Wiley and Sons
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English
โ 111 KB
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In this paper a reconfigurable analog VLSI neural network architecture is presented. The analog architecture implements a Multi-Layer Perceptron whose topology can be programmed without any modification of the off-chip connections. The architecture is scaleable and modular since it is based on a sin