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A p-v-n diode model for CMOS latchup

โœ Scribed by Hans P. Zappe; Chenming Hu


Publisher
Elsevier Science
Year
1991
Tongue
English
Weight
506 KB
Volume
34
Category
Article
ISSN
0038-1101

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A memristive circuit model for p-n junct
โœ Leon O. Chua; Chong-Wei Tseng ๐Ÿ“‚ Article ๐Ÿ“… 1974 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 997 KB

## Abstract A new simple lumped circuit model for junction diodes is presented. The model contains only 4 elements; namely, 2 __controlled current sources__, a __nonlinear capacitor__, and a __memristor__. Each component bears a simple relationship with the physical operating mechanisms inside the