✦ LIBER ✦

A new circuit optimization technique for high performance CMOS circuits

✍ Scribed by Chen, H.Y.; Kang, S.M.

Book ID: 119778547
Publisher: IEEE
Year: 1991
Tongue: English
Weight: 790 KB
Volume: 10
Category: Article
ISSN: 0278-0070
DOI: 10.1109/43.79504

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

High-performance noise-tolerant circuit

High-performance noise-tolerant circuit techniques for CMOS dynamic logic

✍ Frustaci, F.; Corsonello, P.; Perri, S.; Cocorullo, G. 📂 Article 📅 2008 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 712 KB

Temperature-compensation circuit techniq

Temperature-compensation circuit techniques for high-density CMOS DRAMs

✍ Min, D.-S.; Cho, S.; Jun, D.S.; Lee, D.-J.; Seok, Y.; Chin, D. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 692 KB

A High-Performance CMOS Feedforward AGC

A High-Performance CMOS Feedforward AGC Circuit for a WLAN Receiver

✍ Pérez, J.P.A.; Calvo, B.; Celma, S. 📂 Article 📅 2010 🏛 IEEE 🌐 English ⚖ 866 KB

A new modeling technique for mixed-mode

A new modeling technique for mixed-mode simulation of CMOS circuits

✍ Ganesh Samudra; Teng Kiat Lee 📂 Article 📅 1997 🏛 Elsevier Science 🌐 English ⚖ 691 KB

An efficient and accurate simulation of digital circuits is of utmost importance in VLSI design to correctly predict timing performance and to accurately predict electrical waveform at all the nodes which link to analog blocks. To achieve this objective, an improved technique to correctly model the

High performance low power CMOS dynamic

High performance low power CMOS dynamic logic for arithmetic circuits

✍ Victor Navarro-Botello; Juan A. Montiel-Nelson; Saeid Nooshabadi 📂 Article 📅 2007 🏛 Elsevier Science 🌐 English ⚖ 296 KB

A new ESD protection concept for VLSI CM

A new ESD protection concept for VLSI CMOS circuits avoiding circuit stress

✍ X. Guggenmos; R. Holzner 📂 Article 📅 1992 🏛 Elsevier Science 🌐 French ⚖ 916 KB