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A delay line on a VLSI gate array as a time digitizer

โœ Scribed by F. Gasparini; R. Brugnera; R. Carlin; F. Dal Corso; M. De Giorgi; U. Dosselli; M. Grassi; M. Morandin; M. Posocco; L. Stanco; R. Stroili

Publisher
Elsevier Science
Year
1994
Tongue
English
Weight
462 KB
Volume
342
Category
Article
ISSN
0168-9002

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