✦ LIBER ✦

A content addressable memory circuit using Josephson junctions

✍ Scribed by Morisue, M.; Kaneko, M.; Hosoya, H.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A content addressable memory circuit usi

📂 Article 📅 1988 🏛 Elsevier Science 🌐 English ⚖ 89 KB

A Content-Addressable Memory Using “Swit

✍ Tomochika Harada; Shigeo Sato; Koji Nakajima 📂 Article 📅 2000 🏛 Springer 🌐 English ⚖ 255 KB

Memory and logic circuits using semicond

✍ Lum, W.; Chan, H.; Van Duzer, T. 📂 Article 📅 1977 🏛 IEEE 🌐 English ⚖ 404 KB

Lempel-Ziv-type high-speed data compress

✍ Akashi Satoh; Hideto Niijima 📂 Article 📅 1995 🏛 John Wiley and Sons 🌐 English ⚖ 653 KB

Evaluation of a retrieval system using c

✍ Masaki Hashizume; Hirosuke Yamamoto; Takeomi Tamesada; Toshiaki Hanibuti 📂 Article 📅 1989 🏛 John Wiley and Sons 🌐 English ⚖ 644 KB

A novel ternary logic circuit using Jose

✍ Morisue, M.; Oochi, K.; Nishizawa, M. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 314 KB