✦ LIBER ✦

A comparison of systolic architectures for matrix multiplication

✍ Scribed by Lee, H.B.; Grondin, R.O.

Book ID: 119774011
Publisher: IEEE
Year: 1988
Tongue: English
Weight: 454 KB
Volume: 23
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.291

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Time efficient systolic architecture for

Time efficient systolic architecture for matrix vector multiplication

✍ M. Zubair; B.B. Madan 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 391 KB

Two systolic architectures for multiplic

Two systolic architectures for multiplication in GF(2m)

✍ Tsai, W.C.; Wang, S.-J. 📂 Article 📅 2000 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 280 KB

Parallel algorithms and architectures fo

Parallel algorithms and architectures for matrix multiplication

✍ C. Puglisi 📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 648 KB

VLSI systolic arrays for band matrix mul

VLSI systolic arrays for band matrix multiplication

✍ G. Alia 📂 Article 📅 1983 🏛 Elsevier Science 🌐 English ⚖ 771 KB

The advent of VLSI technology has deeply modified the design of digital systems. The structure of special algorithms is now close to the structure of communication and computing resources on the silicon chip. Modular and regular structures allow parallel VLSI algorithms with good figures of complexi

Systolic architectures for the manipulat

Systolic architectures for the manipulator inertia matrix

✍ Amin-Javaheri, M.; Orin, D.E. 📂 Article 📅 1988 🏛 Institute of Electrical and Electronics Engineers ⚖ 954 KB

A class of fault-tolerant systolic array

A class of fault-tolerant systolic arrays for matrix multiplication

✍ I.Ž. Milovanović; E.I. Milovanović; M.K. Stojčev 📂 Article 📅 2011 🏛 Elsevier Science 🌐 English ⚖ 861 KB