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VLSI systolic arrays for band matrix multiplication

✍ Scribed by G. Alia

Publisher
Elsevier Science
Year
1983
Tongue
English
Weight
771 KB
Volume
1
Category
Article
ISSN
0167-9260

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✦ Synopsis

The advent of VLSI technology has deeply modified the design of digital systems. The structure of special algorithms is now close to the structure of communication and computing resources on the silicon chip. Modular and regular structures allow parallel VLSI algorithms with good figures of complexity in terms of speed and size. In this paper systolic arrays of processors are used to define two new faster VLSI algorithms for solving the problem of multiplying two band matrices. The proposed algorithms are based on different area-time trade-off: they exhibit wA.we processors, n steps and n2 processors, min( wA, wB) steps respectively, compared with wA. ws processors, 3n steps of the previously known VLSI algorithm.

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