A class of systolic multiplier units for VLSI technology
β Scribed by A. R. Hurson; B. Shirazi
- Publisher
- Springer
- Year
- 1985
- Tongue
- English
- Weight
- 638 KB
- Volume
- 14
- Category
- Article
- ISSN
- 1573-7640
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π SIMILAR VOLUMES
A simple and general VLSI-architecture, designed to solve a family of basic searching problems, is presented. The actual chip (the H-matrix) may generally be set up to trap requested objects or to detect specific properties in high-rate bit-serial datastreams flowing through the chip. The most impo
## Abstract A modified augmented Lagrange multiplier method for largeβscale nonlinear optimization problem is studied in this paper. The basic steps of the proposed algorithm comprise an outer iteration, in which the Lagrange multipliers and various penalty parameters are updated, and an inner iter