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A 5.3-GHz programmable divider for HiPerLAN in 0.25-/spl mu/m CMOS

✍ Scribed by Krishnapura, N.; Kinget, P.R.


Book ID
119775604
Publisher
IEEE
Year
2000
Tongue
English
Weight
173 KB
Volume
35
Category
Article
ISSN
0018-9200

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A 1.5-V 0.25-ΞΌm CMOS up-converter for 3–
✍ Giuseppina Sapone; Giuseppe Palmisano πŸ“‚ Article πŸ“… 2007 πŸ› John Wiley and Sons 🌐 English βš– 171 KB

## Abstract In this article, the measured performance of a 3–5 GHz low‐power up‐converter is presented. The circuit is based on a current‐reuse topology with resistive load. It was implemented in a standard low‐cost 0.25‐μm CMOS technology. The up‐converter achieves a 3.8‐dB power gain, an output 1