✦ LIBER ✦

A 34-ns 1-Mbit CMOS SRAM using triple polysilicon

✍ Scribed by Wada, T.; Hirose, T.; Shinohara, H.; Kawai, Y.; Yuzuriha, K.; Kohno, Y.; Kayano, S.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 15-ns 1-Mbit CMOS SRAM

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A 46-ns 1-Mbit CMOS SRAM

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A 9-ns 1-Mbit CMOS SRAM

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A 14-ns 1-Mbit CMOS SRAM with variable b

✍ Kohno, Y.; Wada, T.; Anami, K.; Kawai, Y.; Yuzuriha, K.; Matsukawa, T.; Kayano, 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 709 KB

A 25-ns low-power full-CMOS 1-Mbit (128

✍ Chu, S.T.; Dikken, J.; Hartgring, C.D.; List, F.J.; Raemaekers, J.G.; Bells, S.A 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 678 KB

An 8-ns 1-Mbit ECL BiCMOS SRAM with doub

✍ Matsui, M.; Momose, H.; Urakawa, Y.; Maeda, T.; Suzuki, A.; Urakawa, N.; Sato, K 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 1004 KB