✦ LIBER ✦

A 3.125-Gb/s clock and data recovery circuit for the 10-Gbase-LX4 Ethernet

✍ Scribed by Rong-Jyi Yang; Shang-Ping Chen; Shen-Iuan Liu

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Clock and data recovery circuit for 10-G

✍ Kanellos, G.T.; Stampoulidis, L.; Pleros, N.; Houbavlis, T.; Tsiokos, D.; Kehaya 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 348 KB

SiGe BiCMOS 3.3-V clock and data recover

✍ Meghelli, M.; Parker, B.; Ainspan, H.; Soyuer, M. 📂 Article 📅 2000 🏛 IEEE 🌐 English ⚖ 71 KB

10 Gb/s Linear Full-Rate CMOS Phase Dete

✍ X. P. Yu; M. A. Do; R. Wu; K. S. Yeo; J. G. Ma; G. Q. Yan 📂 Article 📅 2005 🏛 Springer 🌐 English ⚖ 462 KB

A 10-gb/s CMOS clock and data recovery c

✍ Kreienkamp, R.; Langmann, U.; Zimmermann, C.; Aoyama, T.; Siedhoff, H. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 603 KB

A 10-Gb/s data-pattern independent clock

✍ Nosaka, H.; Ishii, K.; Enoki, T.; Shibata, T. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 543 KB

A 10-Gb/s CMOS clock and data recovery c

✍ Savoj, J.; Razavi, B. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 216 KB