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A 10-gb/s CMOS clock and data recovery circuit with an analog phase interpolator

✍ Scribed by Kreienkamp, R.; Langmann, U.; Zimmermann, C.; Aoyama, T.; Siedhoff, H.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 10-Gb/s CMOS clock and data recovery c

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10 Gb/s Linear Full-Rate CMOS Phase Dete

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A 10-Gb/s CMOS clock and data recovery c

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Correction to "A 40-Gb/s Clock and Data

✍ Lee, J.; Razavi, B. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 31 KB