✦ LIBER ✦

A 21-mW 4-Mb CMOS SRAM for battery operation

✍ Scribed by Murakami, S.; Fujita, K.; Ukita, M.; Tsutsumi, K.; Inoue, Y.; Sakamoto, O.; Ashida, M.; Nishimura, Y.; Kohno, Y.; Nishimura, T.; Anami, K.

Book ID: 119776054
Publisher: IEEE
Year: 1991
Tongue: English
Weight: 997 KB
Volume: 26
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.98973

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 1991 IEEE International Solid-Stat

[IEEE 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (13-15 Feb. 1991)] 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - A 21mW 4Mb CMOS SRAM For Battery Operation

✍ Murakam, S.; Fujita, K.; Ukita, M.; Tsuisumi, K.; Inoue, Y.; Sakamoto, O.; Ashid 📂 Article 📅 1991 🏛 IEEE ⚖ 540 KB

A circuit technology for high-speed batt

A circuit technology for high-speed battery-operated 16-Mb CMOS DRAM's

✍ Yamauchi, H.; Suzuki, T.; Sawada, A.; Iwata, T.; Tsuji, T.; Agata, M.; Taniguchi 📂 Article 📅 1993 🏛 IEEE 🌐 English ⚖ 855 KB

Power reduction techniques for a 1-Mb EC

Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz

✍ Ohhata, K.; Arakawa, F.; Kusunoki, T.; Nambu, H.; Kanetani, K.; Yamasaki, K.; Hi 📂 Article 📅 2000 🏛 IEEE 🌐 English ⚖ 554 KB

[IEEE Comput. Soc 4th IEEE International

[IEEE Comput. Soc 4th IEEE International Workshop on System-on-Chip for Real-Time Applications - Banff, Alta., Canada (19-21 July 2004)] 4th IEEE International Workshop on System-on-Chip for Real-Time Applications - A digital CMOS imager with pixel level analog-to-digital converter and reconfigurable SRAM/counter

✍ Yat-Fong Yung, ; Bermak, A. 📂 Article 📅 2004 🏛 IEEE Comput. Soc 🌐 English ⚖ 439 KB

[IEEE 2013 IEEE International Solid-Stat

[IEEE 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013) - San Francisco, CA (2013.2.17-2013.2.21)] 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers - A 4× 25-to-28Gb/s 4.9mW/Gb/s −9.7dBm high-sensitivity optical receiver based on 65nm CMOS for board-to-board interconnects

✍ Takemoto, T.; Yamashita, H.; Yazaki, T.; Chujo, N.; Yong Lee, ; Matsuoka, Y. 📂 Article 📅 2013 🏛 IEEE ⚖ 381 KB