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A 200 MHz CMOS pipelined multiplier-accumulator using a quasi-domino dynamic full-adder cell design

✍ Scribed by Lu, F.; Samueli, H.

Book ID: 119773759
Publisher: IEEE
Year: 1993
Tongue: English
Weight: 1002 KB
Volume: 28
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.192043

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