A 1.71-million transistor CMOS CPU chip with a testable cache architecture

✍ Scribed by Saito, Y.; Shimazu, Y.; Shimizu, T.; Shirai, K.; Fujioka, I.; Nishiwaki, Y.; Hinata, J.; Shimotsuma, Y.; Sakao, M.

• Book ID: 119773870
• Publisher: IEEE
• Year: 1993
• Tongue: English
• Weight: 735 KB
• Volume: 28
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.245584