A 1.5-ns access time, 78-μm2 memory-cell size, 64-kb ECL-CMOS SRAM

✍ Scribed by Yamaguchi, K.; Nambu, H.; Kanetani, K.; Idei, Y.; Homma, N.; Hiramoto, T.; Tamba, N.; Watanabe, K.; Odaka, M.; Ikeda, T.; Ohhata, K.; Sakurai, Y.

• Book ID: 119773546
• Publisher: IEEE
• Year: 1992
• Tongue: English
• Weight: 914 KB
• Volume: 27
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.127339