A 0.5-/spl mu/m, 3-V 1T1C, 1-Mbit FRAM with a variable reference bit-line voltage scheme using a fatigue-free reference capacitor

✍ Scribed by Ogiwara, R.; Tanaka, S.; Itoh, Y.; Miyakawa, T.; Takeuchi, Y.; Doumae, S.M.; Takenaka, H.; Kunishima, I.; Shuto, S.; Hidaka, O.; Ohtsuki, S.; Tanaka, S.

• Book ID: 119775554
• Publisher: IEEE
• Year: 2000
• Tongue: English
• Weight: 327 KB
• Volume: 35
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.839914