2-V/100-ns 1T/1C nonvolatile ferroelectric memory architecture with bitline-driven read scheme and nonrelaxation reference cell

✍ Scribed by Hirano, H.; Honda, T.; Moriwaki, N.; Nakakuma, T.; Inoue, A.; Nakane, G.; Chaya, S.; Sumi, T.

• Book ID: 119774711
• Publisher: IEEE
• Year: 1997
• Tongue: English
• Weight: 139 KB
• Volume: 32
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.568826