The VerilogR Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware de
1364-2001 IEEE Standard Verilog Hardware Description Language
- Book ID
- 127439975
- Publisher
- IEEE
- Year
- 2001
- Tongue
- English
- Weight
- 3 MB
- Category
- Library
- ISBN-13
- 9780738128269
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โฆ Synopsis
Abstract: The VerilogR Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the imple-mentors of tools supporting the language and advanced users of the language.
๐ SIMILAR VOLUMES
Standard syntax and semantics for VerilogR HDL-based RTL synthesis are described in this standard.