In this paper, VLSI architectures for solving nonlinear equations are presented, such as the elliptic partial differential equations arising from semiconductor device modeling using a Newton-SOR (Successive Over Relaxation), finite difference, iterative scheme. The computation time for the matrix in
โฆ LIBER โฆ
VLSI simulation device
- Publisher
- Elsevier Science
- Year
- 1986
- Tongue
- English
- Weight
- 114 KB
- Volume
- 9
- Category
- Article
- ISSN
- 0140-3664
No coin nor oath required. For personal study only.
๐ SIMILAR VOLUMES
VLSI architecture for device simulation
โ
Cheng T. Wang
๐
Article
๐
1986
๐
Elsevier Science
๐
English
โ 756 KB
A sputter equipment simulation system fo
โ
T Ohta; H Yamada
๐
Article
๐
1998
๐
Elsevier Science
๐
English
โ 650 KB
In order to optimize the sputter deposition process to fill a minute VLSI's contact hole efficiently, we have developed a practical sputter equipment simulation system named ''SimDepo''. The system is composed of (1) the trajectory calculation of sputtered particles using the Monte Carlo method taki
Simulation of three-dimensional effects
โ
P. Ciampolini; A. Pierantoni; A. Forghieri; G. Baccarani
๐
Article
๐
1990
๐
Elsevier Science
๐
English
โ 407 KB
Simulation software for VLSI
๐
Article
๐
1983
๐
Elsevier Science
๐
English
โ 114 KB
Efficient VLSI fault simulation
โ
John H. Reif
๐
Article
๐
1993
๐
Elsevier Science
๐
English
โ 925 KB
Let C be an acycfic Boolean circuit with n gates and \_< n inputs. A circuit manufacture error may result in a "Stuck-at" (S-A) fault in a circuit identical to C except a gate v only outputs a fixed Boolean value. The S-A fault simulation problem for C is to determine all possible (S-A) faults which
Session E4: VLSI simulation
๐
Article
๐
1993
๐
Elsevier Science
โ 50 KB