<p>From my B.E.E degree at the University of Minnesota and right through my S.M. degree at M.I.T., I had specialized in solid state devices and microelectronics. I made the decision to switch to computer-aided design (CAD) in 1981, only a year or so prior to the introduction of the simulated anneali
VLSI Placement and Routing: The PI Project
β Scribed by Alan T. Sherman
- Publisher
- Springer
- Year
- 1989
- Tongue
- English
- Leaves
- 197
- Series
- Texts and Monographs in Computer Science
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
This book provides a superb introduction to and overview of the MIT PI System for custom VLSI placement and routing. Alan SherΒ man has done an excellent job of collecting and clearly presenting material that was previously available only in various theses, conferΒ ence papers, and memoranda. He has provided here a balanced and comprehensive presentation of the key ideas and techniques used in PI, discussing part of his own Ph. D. work (primarily on the placeΒ ment problem) in the context of the overall design of PI and the contributions of the many other PI team members. I began the PI Project in 1981 after learning first-hand how difΒ ficult it is to manually place modules and route interconnections in a custom VLSI chip. In 1980 Adi Shamir, Leonard Adleman, and I designed a custom VLSI chip for performing RSA encrypΒ tion/decryption [226]. I became fascinated with the combinatorial and algorithmic questions arising in placement and routing, and beΒ gan active research in these areas. The PI Project was started in the belief that many of the most interesting research issues would arise during an actual implementation effort, and secondarily in the hope that a practically useful tool might result. The belief was well-founded, but I had underestimated the difficulty of building a large easily-used software tool for a complex domain; the PI softΒ ware should be considered as a prototype implementation validating the design choices made.
β¦ Table of Contents
Front Matter....Pages i-xii
Introduction....Pages 1-25
Preliminaries....Pages 27-35
The Placement Framework....Pages 37-51
Chip Estimation and Pad Placement....Pages 53-58
Logic Placement....Pages 59-92
Power-Ground Routing....Pages 93-98
Signal Routing....Pages 99-113
Resizing....Pages 114-120
The MIT Implementation of PI....Pages 121-132
Related Layout Systems....Pages 133-150
Conclusion....Pages 151-154
Back Matter....Pages 155-193
β¦ Subjects
Programming Languages, Compilers, Interpreters;Electronics and Microelectronics, Instrumentation;Processor Architectures
π SIMILAR VOLUMES
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With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intel