VLSI for Neural Networks and Artificial Intelligence

✍ Scribed by Howard C. Card (auth.), José G. Delgado-Frias, William R. Moore (eds.)

• Publisher: Springer US
• Year: 1994
• Tongue: English
• Leaves: 318
• Edition: 1
• Category: Library

✦ Synopsis

Neural network and artificial intelligence algorithrns and computing have increased not only in complexity but also in the number of applications. This in turn has posed a tremendous need for a larger computational power that conventional scalar processors may not be able to deliver efficiently. These processors are oriented towards numeric and data manipulations. Due to the neurocomputing requirements (such as non-programming and learning) and the artificial intelligence requirements (such as symbolic manipulation and knowledge representation) a different set of constraints and demands are imposed on the computer architectures/organizations for these applications. Research and development of new computer architectures and VLSI circuits for neural networks and artificial intelligence have been increased in order to meet the new performance requirements. This book presents novel approaches and trends on VLSI implementations of machines for these applications. Papers have been drawn from a number of research communities; the subjects span analog and digital VLSI design, computer design, computer architectures, neurocomputing and artificial intelligence techniques. This book has been organized into four subject areas that cover the two major categories of this book; the areas are: analog circuits for neural networks, digital implementations of neural networks, neural networks on multiprocessor systems and applications, and VLSI machines for artificial intelligence. The topics that are covered in each area are briefly introduced below.

✦ Table of Contents

Front Matter....Pages i-x
Analog VLSI Neural Learning Circuits — A Tutorial....Pages 1-23
An Analog CMOS Implementation of a Kohonen Network with Learning Capability....Pages 25-34
Back-Propagation Learning Algorithms for Analog VLSI Implementation....Pages 35-44
An Analog Implementation of the Boltzmann Machine with Programmable Learning Algorithms....Pages 45-52
A VLSI Design of the Minimum Entropy Neuron....Pages 53-60
A Multi-Layer Analog VLSI Architecture for Texture Analysis Isomorphic to Cortical Cells in Mammalian Visual System....Pages 61-70
A VLSI Pipelined Neuroemulator....Pages 71-80
A Low Latency Digital Neural Network Architecture....Pages 81-91
MANTRA: A Multi-Model Neural-Network Computer....Pages 93-102
SPERT: A Neuro-Microprocessor....Pages 103-107
Design of Neural Self-Organization Chips for Semantic Applications....Pages 109-117
VLSI Implementation of a Digital Neural Network with Reward-Penalty Learning....Pages 119-127
Asynchronous VLSI Design for Neural System Implementation....Pages 129-139
VLSI-Implementation of Associative Memory Systems for Neural Information Processing....Pages 141-150
A Dataflow Approach for Neural Networks....Pages 151-158
A Custom Associative Chip Used as a Building Block for a Software Reconfigurable Multi-Network Simulator....Pages 159-166
Parallel Implementation of Neural Associative Memories on RISC Processors....Pages 167-176
Reconfigurable Logic Implementation of Memory-Based Neural Networks: A Case Study of the CMAC Network....Pages 177-186
A Cascadable VLSI Design for GENET....Pages 187-196
Parametrised Neural Network Design and Compilation into Hardware....Pages 197-206
Knowledge Processing in Neural Architecture....Pages 207-216
Two Methods for Solving Linear Equations Using Neural Networks....Pages 217-229
Hardware Support for Data Parallelism in Production Systems....Pages 231-242
SPACE: Symbolic Processing in Associative Computing Elements....Pages 243-252
PALM: A Logic Programming System on a Highly Parallel Architecture....Pages 253-263
A Distributed Parallel Associative Processor (DPAP) for the Execution of Logic Programs....Pages 265-273
Performance Analysis of a Parallel VLSI Architecture for Prolog....Pages 275-284
A Prolog VLSI System for Real Time Applications....Pages 285-295
An Extended WAM Based Architecture for OR-Parallel Prolog Execution....Pages 297-306
Architecture and VLSI Implementation of a Pegasus-II Prolog Processor....Pages 307-315
Back Matter....Pages 317-320

✦ Subjects

Computer Systems Organization and Communication Networks; Electrical Engineering