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Verified Code Generation for Embedded Systems

✍ Scribed by Sabine Glesner; Rubino Geiß; Boris Boesler


Publisher
Elsevier Science
Year
2002
Tongue
English
Weight
310 KB
Volume
65
Category
Article
ISSN
1571-0661

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✦ Synopsis


Digital signal processors provide specialized SIMD (single instruction multiple data) operations designed to dramatically increase performance in embedded systems. While these operations are simple to understand, their unusual functions and their parallelism make it difficult for automatic code generation algorithms to use them effectively. In this paper, we present a new optimizing code generation method that can deploy these operations successfully while also verifying that the generated code is a correct translation of the input program.


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