Verification of Datapath and Controller Generation Phase in High-Level Synthesis of Digital Circuits

✍ Scribed by Karfa, C.; Sarkar, D.; Mandal, C.

• Book ID: 117908351
• Publisher: IEEE
• Year: 2010
• Tongue: English
• Weight: 486 KB
• Volume: 29
• Category: Article
• ISSN: 0278-0070
• DOI: 10.1109/tcad.2009.2035542