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Ultralow resistance W/poly-Si gate CMOS technology using amorphous-Si/TiN buffer layer
✍ Scribed by Wakabayashi, H.; Yamamoto, T.; Yoshida, K.; Soda, E.; Tokunaga, K.I.; Mogami, T.; Kunio, T.
- Book ID
- 114538998
- Publisher
- IEEE
- Year
- 2002
- Tongue
- English
- Weight
- 186 KB
- Volume
- 49
- Category
- Article
- ISSN
- 0018-9383
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