✦ LIBER ✦
Ultra-low power 32-bit pipelined adder using subthreshold source-coupled logic with 5 fJ/stage PDP
✍ Scribed by Armin Tajalli; Elizabeth J. Brauer; Yusuf Leblebici
- Book ID
- 104053467
- Publisher
- Elsevier Science
- Year
- 2009
- Tongue
- English
- Weight
- 522 KB
- Volume
- 40
- Category
- Article
- ISSN
- 0026-2692
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