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Tracking performance of digital chip synchronisation algorithms for bandlimited direct-sequence spread-spectrum communication

โœ Scribed by Moeneclaey, M.; de Jonghe, G.


Book ID
118048927
Publisher
The Institution of Electrical Engineers
Year
1991
Tongue
English
Weight
274 KB
Volume
27
Category
Article
ISSN
0013-5194

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โœ Hasson, Jaime ;Bobrovsky, Ben Zion ๐Ÿ“‚ Article ๐Ÿ“… 2005 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 198 KB

Noncoherent digital delay lock loops (DDLL) are suited for chip timing synchronisation in band-limited direct-sequence spread-spectrum (DSSS) demodulators. The diffusion approximation and the singular perturbation method are used in this paper to calculate the mean time to lose lock (MTLL) of the DD