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Threshold voltage shift in 0.1 μm self-aligned-gate GaAs MESFETs under bias stress and related degradation of ultra-high-speed digital ICs

✍ Scribed by Yoshino K. Fukai; Kimiyoshi Yamasaki; Kazumi Nishimura


Book ID
108362465
Publisher
Elsevier Science
Year
1999
Tongue
English
Weight
184 KB
Volume
39
Category
Article
ISSN
0026-2714

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