The SUPRENUM vector floating-point unit
โ Scribed by Hubert Kammer
- Publisher
- Elsevier Science
- Year
- 1988
- Tongue
- English
- Weight
- 613 KB
- Volume
- 7
- Category
- Article
- ISSN
- 0167-8191
No coin nor oath required. For personal study only.
๐ SIMILAR VOLUMES
Addition is the most frequent floating-point operation in modem microprocessors. Due to its complex shift-add-shift-round data flow, floating-point addition can have a long latency. To achieve maximum system performance, it is necessary to design the floating-point adder to have minimum latency, wh
A triatomic classical trajectory code has been modified by extensive vectorization of the algorithms to achieve much improved performance on an FPS 164 attached processor. Extensive timings on both the FPS 164 and a VAX 11/780 with floating point accelerator are presented as a function of the number