✦ LIBER ✦

The quaternary interface technique in ECL integrated circuits

✍ Scribed by Zhang Zhuan; Wu Xunwei

Book ID: 112890571
Publisher: SP Science Press
Year: 1992
Tongue: English
Weight: 257 KB
Volume: 9
Category: Article
ISSN: 0217-9822
DOI: 10.1007/bf02778591

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Clock breakthrough in ECL integrated cir

Clock breakthrough in ECL integrated circuits

✍ Hawker, I. 📂 Article 📅 1983 🏛 The Institution of Electrical Engineers ⚖ 510 KB

A New Versatile Testing Interface for Fa

A New Versatile Testing Interface for Failure Analysis in Integrated Circuits

✍ Romain Desplats; Philippe Perdu; Felix Beaudoin 📂 Article 📅 2001 🏛 Elsevier Science 🌐 English ⚖ 395 KB

The “pinch” resistor in integrated circu

The “pinch” resistor in integrated circuits

✍ R.P. O'Grady 📂 Article 📅 1968 🏛 Elsevier Science 🌐 English ⚖ 189 KB

Stability of interface voids in copper m

Stability of interface voids in copper metallization for integrated circuit applications

✍ J. H. Choy 📂 Article 📅 2004 🏛 TechnoPress 🌐 English ⚖ 227 KB

An interface and communication technique

An interface and communication technique between circuit blocks in system LSI

✍ Masafumi Hayakawa; Tsugio Nakamura; Narito Fuyutsume; Hiroshi Kasahara; Teruo Ta 📂 Article 📅 2008 🏛 Wiley (John Wiley & Sons) 🌐 English ⚖ 991 KB

TEM techniques for two dimensional junct

TEM techniques for two dimensional junction delineation in integrated circuits

✍ A. Romano; J. Vanhellemont; J.R. Morante; W. Vandervorst 📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 212 KB

The packing density of integrated circuits is increasing continuously accompanied by a reduction of the effective size of its components (transistors, resistors and others), not only lateral but also in depth. In the case of the transistorsvery shallow junctions have to be fabricated. A tight contro