The logical synthesis of a ternary adder
✍ Scribed by L. Sordević
- Publisher
- Springer US
- Year
- 1967
- Tongue
- English
- Weight
- 73 KB
- Volume
- 3
- Category
- Article
- ISSN
- 1573-8337
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📜 SIMILAR VOLUMES
We have designed, implemented and studied the performance at liquid nitrogen temperature (77 K) of a CMOS ternary full adder and its building blocks, the simple ternary inverter (STI), positive ternary inverter (PTI) and negative ternary inverter (NTI), and compared the corresponding performance at
Performance evaluation of a two-level carry-skip adder using complementary pass-transistor logic (CPL) is presented in this paper. The adder is compared with a fulI-CMOS version of the two-level carry-skip architecture, with a carry-lookahead adder automatically generated with ALLIANCE CAD tools and
thinking about and planning a synthesis (camphor, Komppa, 1903; tropinone, Robinson, 1917; hemin, Hans Fischer, 1929; vitamin C, Reichstein, 1934; quinine, Woodward and Doering, 1944). After 1945 several influences enhanced synthesis to a higher level of sophistication, such as the develop-