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The Ge condensation technique: A solution for planar SOI/GeOI co-integration for advanced CMOS technologies?

✍ Scribed by B. Vincent; J.F. Damlencourt; Y. Morand; A. Pouydebasque; C. Le Royer; L. Clavelier; N. Dechoux; P. Rivallin; T. Nguyen; S. Cristoloveanu; Y. Campidelli; D. Rouchon; M. Mermoux; S. Deleonibus; D. Bensahel; T. Billon


Publisher
Elsevier Science
Year
2008
Tongue
English
Weight
814 KB
Volume
11
Category
Article
ISSN
1369-8001

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