The development of a fully implanted 3 micron poly-gate NMOS technology—(Part 1) : V. K. Dwivedi, G. S. Gupta and W. S. Khokle. Microelectron. J.18 (1), 29 (1987)

The development of a fully implanted 3 m

The development of a fully implanted 3 micron poly-gate NMOS technology — (Part 1)

✍ V.K. Dwivedi; G.S. Virdi; S. Gupta; W.S. Khokle 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 224 KB

Initial efforts have been made to develop a fully implanted 3 micron poly-gate NMOS technology for fabricating an 8-bit binary counter chip. The MOS transistors in the circuit, initially designed for 8 micron gate length were scaled down to 3 micron by overexposure and over-etching techniques. The p