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TCAD-Based Statistical Analysis and Modeling of Gate Line-Edge Roughness Effect on Nanoscale MOS Transistor Performance and Scaling

✍ Scribed by Kim, S.-D.; Wada, H.; Woo, J.C.S.


Book ID
120824827
Publisher
IEEE
Year
2004
Tongue
English
Weight
644 KB
Volume
17
Category
Article
ISSN
0894-6507

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