<p><span>Now in a thoroughly revised second edition, this practical practitioner guide provides a comprehensive overview of the SoC design process. It explains end-to-end system on chip (SoC) design processes and includes updated coverage of design methodology, the design environment, EDA tool flow,
System on Chip (SOC) Architecture. A Practical Approach
â Scribed by Veena S. Chakravarthi, Shivananda R. Koteshwar
- Publisher
- Springer
- Year
- 2023
- Tongue
- English
- Leaves
- 174
- Category
- Library
No coin nor oath required. For personal study only.
⌠Table of Contents
Foreword by Pradip K. Dutta
Foreword by S. Janakiraman
Foreword by Puneet Gupta
Preface
Contents
Abbreviations
Chapter 1: Introduction to Systems
1.1 Introduction
1.2 System Organization
1.3 System on Chip (SOC)
1.4 SOC Constituents
1.5 SOC Evolution
1.6 SOC Attributes
1.7 SOC Subsystems
1.8 SOC Architectures
1.9 Advanced Trends in SOCs
Chapter 2: System on Chips (SOC)
2.1 Processor in SOC
2.2 Types of Processor Architectures
2.2.1 Instruction-driven Processor Architecture
2.2.2 Data-driven Architecture
2.2.3 Platform-driven Architecture
2.2.4 IP Core-driven SOC Processors
2.3 System-Level/Virtual Modeling Platforms
2.4 Physical Platforms
2.5 System Fabrication
2.6 Domain-specific SOC Architectures
2.6.1 IOT Architecture
2.6.1.1 Device Layer
2.6.1.2 Network Layer
2.6.1.3 Application Layer
2.6.2 Different Stages of IoT Architecture
2.6.3 Digital Signal Processors
2.6.3.1 DSP Architectures
Von Neumann Architecture
Harvard Architecture
Super Harvard Architecture
2.6.3.2 Types of Digital Signal Processors
Fixed-Point Digital Signal Processor
Floating-Point Digital Signal Processor
2.6.3.3 DSP Memory Architecture
Harvard Architecture
2.6.3.4 Difference Between Digital Signal Processor and Microprocessor
2.6.3.5 DSP Advantages and Disadvantages
2.6.3.6 DSP Applications
Chapter 3: System on Chip (SOC) Architecture
3.1 System on Chip (SOC) Architecture
3.2 Architecture Processes and Their Dependencies
3.3 SOC Architecture and SOC Design
3.3.1 Requirement Capture
3.3.2 Types of SOC Architectures
3.3.2.1 Computing SOC Architectures
3.3.2.2 IOT SOC Architectures
3.3.2.3 Automotive SOC Architectures
3.4 Approach to Defining SOC Architecture
Chapter 4: Application-specific SOCs
4.1 Application-specific SOCs
4.2 Embedded Computers
4.2.1 Embedded Processor Subsystems
4.2.1.1 Pipelining
4.2.1.2 Parallelism
4.2.2 Hardware-Software Interface
4.2.2.1 Stored Program Concept
4.2.3 Exceptions and Interrupts
4.3 System Modelling
4.4 Capturing System Requirements
4.4.1 Explicit and Implicit Requirements
4.5 Deriving SOC Specifications
4.5.1 Clock Frequency
4.5.2 Choice of Processor Cores
4.5.3 System Software
4.6 Processor Subsystem IP selection
Chapter 5: Storage in SOCs
5.1 Storage in SOCs
5.1.1 On-chip Cache Memories
5.1.1.1 Cache Memory Organization
5.1.1.2 Cache Hierarchy
5.1.1.3 Levels of Cache Memory in Subsystems of SOC
5.1.1.4 Cache Line and Cache Bandwidth
5.1.1.5 Cache Properties
5.1.2 Translation Lookaside Buffer (TLB)
5.1.3 On-chip Data or Buffers
5.2 Types of Memories
5.2.1 Redundancy in Memory
5.3 Memories in Advanced System Architectures
Chapter 6: SOC Architecture: AÂ Case Study
6.1 Introduction to SOC Requirements (Environment Parameters)
6.2 Smart IoT SOC for Environment MonitoringâAn Architectural Case Study
6.2.1 Identifying SOC Requirements
6.2.2 Proof of Concept System
6.2.3 IoT Device
6.2.3.1 IOT SOC
6.2.3.2 IoT Device Firmware
6.2.3.3 Scalability
6.2.3.4 Hardware Software Partition
6.3 IOT SOC Hardware Software Partition
6.3.1 System Design Plan
References
Chapter 7: IOT SOC Architecture Definition
7.1 Chip Architecture Flow
7.2 Chip Specification
7.3 Hard IP Cores
7.4 Soft IP Cores
7.5 Firm IP Core
7.6 Chip Data Flow Architecture
7.7 Case Study of SOC for Environmental Monitoring
7.7.1 SOC Architecture as Standard Data Path
Chapter 8: SOC Software
8.1 Software Development Life Cycle (SDLC)
8.1.1 Phase 1: Requirement Collection and Analysis
8.1.2 Phase 2: Feasibility Study
8.1.3 Phase 3: Software Design
8.2 High-Level Design (HLD)
8.3 Low-Level Design (LLD)
8.3.1 Phase 4: Coding
8.3.2 Phase 5: Testing
8.3.3 Phase 6: Installation/Deployment
8.3.4 Phase 7: Maintenance
8.4 Software Architecture Styles
8.5 Layered Architecture
8.6 Event-Driven Architecture
8.7 IOT Software Development for Environment Monitoring
8.7.1 Communication Technologies
8.7.2 OSI Model in Software Architecture
8.8 Application Software for IOT SOC
8.9 Prototype Design of IOT SOC-Based Solution
8.9.1 Cloud Storage and Analytics Setup
8.10 Registration to Cloud Server
8.11 Cloud Server Access
8.12 Product Design
8.12.1 Product Validation and Testing
8.12.1.1 Functionality Test
8.12.1.2 Compatibility Test
8.12.1.3 Stress and Scalability Test
8.12.1.4 Data Integrity Test
8.12.1.5 Security Test
8.12.1.6 Performance Test
8.12.1.7 Safety and Environment Tests
8.12.1.8 IOT Testing on the Internet
8.12.1.9 IOT System for Smart Environment Monitoring Testing
8.13 Future Scope of IOT SOC Solution
Chapter 9: SOC Advanced Architectures
9.1 SOC Advanced Architectures
9.2 SOC Accelerators
9.3 Scalable Platform Architectures
9.4 Multiple Clock SOC Architecture
9.5 Multiple Voltage Architecture
9.6 Requirements to Create a Multi-Voltage Design
9.6.1 Level Shifters
9.6.2 Power Gating
9.6.3 Clock Gating
9.7 Near Memory Processing Architectures
9.7.1 In-Memory Processing Architectures
9.8 Guidelines for a Good SOC Architecture
Reference
Chapter 10: Self-Assessment Question Bank
Index
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