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Synthesis of fault diagnosable combinational logic circuits : M. Yamamoto and K. Kinoshita. Trans. Inst. Elec. Commun. Engrs. Japan 55-D, No. 1 (1972), p. 31. (In Japanese.)

Publisher: Elsevier Science
Year: 1972
Tongue: English
Weight: 71 KB
Volume: 11
Category: Article
ISSN: 0026-2714
DOI: 10.1016/0026-2714(72)90484-2

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