The RF measurements were obtained using an HP8510C network analyzer and calibrated using (SOLT) on-wafer standards. The measured and simulated S-parameter results of the SOI back-toback CBCPW-microstrip transition design are shown in Figure 2. The measured return loss is less than 20 dB at 10 -27 GHz with insertion loss of less than 1 dB. The measured and simulated characteristics shown in Figure 4 can be explained as follows. When no bias is applied, at the off-state, the measured isolation is less than 18 dB at 5-20 GHz. However, when a voltage of 35 V is applied at the on-state, as shown in Figure 5, the insertion loss is less than 2 dB at 5-20 GHz. The difference between the measurement and simulation results is due to the fact that the structure is shielded to have a single quasi-TEM mode at the excitation-input CPW mode in the simulation. Additionally, the excitations of the RF probes were excluded from the simulated model.
4. CONCLUSION
An improved transition design that allows the use of coplanar probes to test microstrip circuits without any via holes, micromachining, wire bonding, or air bridge at the wafer level has been proposed. The measured results for back-to-back transition of CBCPW microstrip on SOI wafer include a return loss of less than 20 dB at 10 -27 GHz and insertion loss of less than 1 dB along the entire band. The electric and magnetic fields can be transformed smoothly from the CPW mode to the microstrip mode while maintaining matched characteristic impedance along the transition. The proposed technique has also been combined and developed as a new type of microstrip lateral metal-contacting RF MEMS series switch or lateral relay on wafer measurement for microwave MMICs to avoid high-precision bonding. The measured isolation is less than 18 dB and the insertion loss is lower than 2 dB at 5-20 GHz. The simplicity of this process allows design flexibility and ease of integration to micro switch and other RF MEMS applications.