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Setting the trap for hot carriers [MOS VLSI]

✍ Scribed by Aur, S.; Duvvury, C.; Hunter, W.R.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Hot-carrier effects in submicrometre MOS

✍ Takeda, E. 📂 Article 📅 1984 🏛 The Institution of Electrical Engineers ⚖ 771 KB

Simulation of hot-carrier induced MOS ci

✍ Leblebici, Y.; Kang, S.M. 📂 Article 📅 1994 🏛 IEEE 🌐 English ⚖ 960 KB

Parametric macro-modeling of hot-carrier

✍ Leblebici, Y.; Sun, W.; Kang, S.M. 📂 Article 📅 1993 🏛 IEEE 🌐 English ⚖ 490 KB

Model and performance of hot-electron MO

✍ Hoefflinger, B.; Sibbert, H.; Zimmer, G. 📂 Article 📅 1979 🏛 IEEE 🌐 English ⚖ 699 KB

On the hot-carrier-induced post-stress i

✍ Bellens, R.; de Schrijver, E.; Van den Bosch, G.; Groeseneken, G.; Heremans, P.; 📂 Article 📅 1994 🏛 IEEE 🌐 English ⚖ 714 KB

Setting the cytokine trap for autoimmuni

✍ Dinarello, Charles A. 📂 Article 📅 2003 🏛 Nature Publishing Group 🌐 English ⚖ 148 KB