✦ LIBER ✦

Selective block buffering TLB system for embedded processors

✍ Scribed by Lee, J.-H.; Weems, C.; Kim, S.-D.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A Low Power TLB Structure for Embedded S

✍ Jin-Hyuck Choi; Jung-Hoon Lee; Seh-Woong Jeong; Shin-Dug Kim; Weems, C. 📂 Article 📅 2002 🏛 IEEE 🌐 English ⚖ 349 KB

Low-power branch target buffer for appli

✍ Petrov, P.; Orailoglu, A. 📂 Article 📅 2005 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 162 KB

Scalable, vector processors for embedded

✍ Kozyrakis, C.E.; Patterson, D.A. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 288 KB

Efficient Block Scheduling to Minimize C

✍ Inki Hong; Miodrag Potkonjak; Marios Papaefthymiou 📂 Article 📅 1999 🏛 Springer US 🌐 English ⚖ 171 KB

An Energy-Efficient Processor Architectu

✍ Balfour, J.; Dally, W.J.; Black-Schaffer, D.; Parikh, V.; JongSoo Park 📂 Article 📅 2008 🏛 IEEE 🌐 English ⚖ 157 KB

QoS for high-performance SMT processors

✍ Cazorla, F.J.; Ramirez, A.; Valero, M.; Knijnenburg, P.M.W.; Sakellariou, R.; Fe 📂 Article 📅 2004 🏛 IEEE 🌐 English ⚖ 121 KB