Section B1: Silicon Compilation

A survey of silicon compilation

✍ M.A. Spink 📂 Article 📅 1988 🏛 Elsevier Science 🌐 English ⚖ 94 KB

Second generation' silicon compilers

✍ S.S. Dlay 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 757 KB

The paper describes a "first generation' silicon compiler for full custom NMOS and CMOS designs. The circuits are captured by using procedures embedded in the high level language PASCAL. Although the system enables designs to be described relatively quickly and reliably, and contains all the powerfu

Lattice logic improve silicon compiler

📂 Article 📅 1984 🏛 Elsevier Science 🌐 English ⚖ 88 KB

LIDO — A silicon compiler preprocessor

✍ Bakowski Przemysław; Pawlak Adam 📂 Article 📅 1987 🏛 Elsevier Science ⚖ 404 KB

Compilation method for 1

✍ Hideki Ueyama; Sachiho Adachi; Fujio Kimura 📂 Article 📅 2009 🏛 Springer 🌐 English ⚖ 464 KB

Adapted silicon compiler goes to USA

✍ Lattice Logic 📂 Article 📅 1984 🏛 Elsevier Science 🌐 English ⚖ 579 KB

Lattice Logic has sold a version of its silicon compiler for integrated circuit design to VLSl Inc. of San Jose, California, USA in a form dedicated to VTI's CMOS process. Chipsmith, the product from Lattice Logic, produces an artwork database for standard cell fabrication. VTI will be using this to