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Scalable shared memory LTL model checking

✍ Scribed by J. Barnat; L. Brim; P. Ročkai

Publisher
Springer
Year
2010
Tongue
English
Weight
622 KB
Volume
12
Category
Article
ISSN
1433-2779

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Scalability of a multiprocessor architecture depends on its ability to manage interconnection network latency with increasing number of processors. Interconnection network latency can be minimized by reducing the distance traversed by a message in terms of number of nodes and wire lengths. Scalabili