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Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations

✍ Scribed by Carrillo, Snaider; Harkin, Jim; McDaid, Liam J.; Morgan, Fearghal; Pande, Sandeep; Cawley, Seamus; McGinley, Brian

No coin nor oath required. For personal study only.

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