<span>MACHINE LEARNING TECHNIQUES FOR VLSI CHIP DESIGN</span><p><span>This cutting-edge new volume covers the hardware architecture implementation, the software implementation approach, the efficient hardware of machine learning applications with FPGA or CMOS circuits, and many other aspects and app
Reuse Techniques for VLSI Design
β Scribed by A. Sauer (auth.), Ralf Seepold, Arno Kunzmann (eds.)
- Publisher
- Springer US
- Year
- 1999
- Tongue
- English
- Leaves
- 161
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results.
Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models.
Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design.
β¦ Table of Contents
Front Matter....Pages I-XIV
ECSI, VSIA and MEDEA β How International Organisations Support Reusability....Pages 1-8
Analyzing the Cost of Design for Reuse....Pages 9-20
A Flexible Classification Model for Reuse of Virtual Components....Pages 21-36
An Integrated Approach Towards a Corporate Design Reuse Strategy....Pages 37-47
Design Methodology for IP Providers....Pages 49-62
Hard IP Reuse Methodology for Embedded Cores....Pages 63-78
A Reuse Library Approach in Engineering Context....Pages 79-90
Aspects of Reuse in the Design of Mixed-Signal Systems....Pages 91-102
Design Reuse Experiment for Analog Modules βDreamβ....Pages 103-110
Redesign of an MPEG-2-HDTV Video Decoder Considering Reuse Aspects....Pages 111-123
Reuse Concepts in Gropius....Pages 125-137
Legal Aspects of Reuse of Intellectual Property....Pages 139-143
References....Pages 145-150
Back Matter....Pages 151-153
β¦ Subjects
Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design; Computer Hardware
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