Resist trimming technique in CF4/O2 high
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Chian-Yuh Sin; Bing-Hung Chen; W.L Loh; J Yu; P Yelehanka; L Chan
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Article
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2003
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Elsevier Science
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English
⚖ 356 KB
Resist trimming process using CF / O has been developed for sub-0.1 mm polysilicon gate patterning using 4 2 conventional 248-nm lithography. This process allows the successful fabrication of 80-nm MOS devices. The trimming step is performed in situ as part of the polysilicon gate etching process. T