✦ LIBER ✦
Quantifying SMT decoupling capacitor placement in dc power-bus design for multilayer PCBs
✍ Scribed by Jun Fan; Drewniak, J.L.; Knighten, J.L.; Smith, N.W.; Orlandi, A.; Van Doren, T.P.; Hubing, T.H.; DuBroff, R.E.
- Book ID
- 114534329
- Publisher
- IEEE
- Year
- 2001
- Tongue
- English
- Weight
- 406 KB
- Volume
- 43
- Category
- Article
- ISSN
- 0018-9375
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